SDK • Enforced Stack Limits (was "Stack Location" (was "Troubles with Lua"))

Armv8-M architecture has some nice stack limit checking features: for processors based on the Armv8-M Mainline architecture (like ... M33), each of the stack pointers has a corresponding stack limit register which allows software to define watermark levels for stack overflow detection, and when stack overflow occurs, a Usage fault or HardFault exception is triggered.

MSPLIM...
PSPLIM
The stack limit registers limit the extent to which the MSP
and PSP registers can descend respectively. There are
two MSPLIM registers in the Cortex-M33 processor:
MSPLIM_NS for the Non-secure state, and MSPLIM_S for the
Secure state. There are two PSPLIM registers in the
Cortex-M33 processor: PSPLIM_NS for the Non-secure state,
and PSPLIM_S for the Secure state.

Statistics: Posted by carlk3 — Sat Aug 17, 2024 5:57 pm