CorrectFirst, the inductor L1 appears to be routed on the bottom layer, right? I assume that’s why it’s shown in that pinkish color and has multiple vias on the pads. Just wanted to confirm.
Yes they are weird and I can't see any advantage to having them. I'd remove them as I always ground flood the bottom layer so as to reduce EMC.Second, the vias I circled in red — I’m not entirely sure what’s going on there. Are they suggesting that I should also have VIN and VOUT polygon pours on the bottom layer and connect them through those vias?
Statistics: Posted by MikeDB — Sun Jun 29, 2025 5:32 am